This application claims the priority of Korean Patent Application No. 2002-005197, filed in the Korean Intellectual Property Office on Jan. 29, 2002, the disclosure of which is incorporated herein in its entirety by reference.
1. Field of the Invention
The present invention relates to a multi-channel A/D converter, and more particularly, to an A/D converter which converts analog signals, each of which is input through one of a plurality of channels, into digital signals, and a signal processing apparatus, an optical disc drive, and a reproducing apparatus using the same.
2. Description of the Related Art
An A/D converter is used to convert an analog signal into a digital signal, and is a component that is installed in most digital apparatuses. In particular, a multi-channel A/D converter is a device which converts a plurality of analog signals, which are input through a plurality of channels, into digital signals using a time-division method in one A/D converter. The multi-channel A/D converter and a signal processing apparatus having the same are used particularly in a disc drive for recording predetermined information on a disc, or reproducing information recorded on a disc, and in a reproducing apparatus having the disc drive.
In a disc, a variety of signal sources are prepared so as to control recording/reproducing of information. A pickup generates a variety of analog signals used in controlling the pickup from the disc. Those analog signals include a focusing signal, which is used to control the focusing of an optical spot that is directed from the pickup to the disc, a tracking signal, which is used to control the tracking, and other RF signals.
In the conventional A/D converter, a sampling rate is fixed for each channel. That is, a channel selection order (sampling rate by channel) is stored in a memory formed with ROMs. If a user desires to later change the sampling rate for a channel, the hardware setup needs to be changed. Also, when a time slot that is obtained based on a system clock is used in time division, and when the A/D converting result is read for each channel, unless the result is read immediately after the completion of conversion, there occurs a time delay of a time slot interval.
To solve the above and other problems, it is an object of the present invention to provide a multi-channel A/D converter which changes a channel selection order and a sampling rate without changing the hardware setup, and a system using the same.
It is another object of the present invention to provide a multi-channel A/D converter which reduces a time delay, and a system using the same.
It is a further object of the present invention to provide a multi-channel A/D converter which has an operation mode that reduces the time delay, and a system using the same.
Additional objects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
To accomplish the above and for other objects, there is provided a multi-channel Analog/Digital (A/D) converter according to an embodiment of the invention that includes a programmable memory on which a channel selection order is recorded, a channel selection unit which selects a channel according to the channel selection order recorded on the programmable memory, and a converting unit which converts an analog signal of the selected channel into digital data.
According to an aspect of the invention, the channel selection unit comprises a synchronization signal generator which generates a synchronization signal, and a channel selection controller which outputs a channel selection signal referring to the channel selection order recorded on the programmable memory, based on the synchronization signal.
According to another aspect of the invention, the converting unit comprises a multiplexer which receives an analog signal corresponding to one of a plurality of channels, and outputs an analog signal corresponding to a channel based on the channel selection signal, and an A/D converter which converts the analog signal output from the multiplexer into digital data.
According to yet another aspect of the invention, the synchronization signal generator generates a synchronization signal at each cycle of an A/D clock prepared in the A/D converter, or generates a synchronization signal at each slot corresponding to an integer multiple of the A/D clock cycle.
According to still another aspect of the invention, the synchronization signal generator generates a synchronization signal at each cycle of an A/D clock in an automatic A/D clock mode, and generates a corresponding synchronization signal at each slot corresponding to an integer multiple of a system clock in an automatic slot mode.
According to still yet another aspect of the invention, the synchronization signal generator is disabled in a manual mode, and the channel selection controller outputs a channel selection signal according to channel selection information provided by a signal processor, and, if the synchronization signal is input, the channel selection controller outputs an address of a channel corresponding to the signal as a channel selection signal.
According to another embodiment of the invention, the multi-channel A/D converter is achieved by a chip on which the multi-channel A/D converter mounted, a disc drive in which the chip is embedded, or a reproducing apparatus in which the disc driver is installed.
According to a further embodiment of the invention, a signal processing apparatus includes an A/D converter which comprises a programmable memory on which a channel selection order is recorded, a channel selection unit which selects a channel according to the channel selection order recorded on the programmable memory, a converting unit which converts an analog signal of the selected channel into digital data, and a storage unit which stores the converted digital data; and a digital signal processor which reads digital data stored in the storage unit, processes the data, and outputs a predetermined signal.
According to an aspect of the invention, the channel selection order stored in the programmable memory is changed using the digital signal processor.
According to another aspect of the invention, the channel selection order stored in the programmable memory is changed by changing firmware, and the digital signal processor executes portions of the firmware.
According to a further aspect of the invention, the channel selection unit comprises a synchronization signal generator which generates a synchronization signal, and a channel selection controller which generates a channel selection signal referring to the channel selection order recorded in the programmable memory, based on the synchronization signal.
According to a yet further aspect of the invention, the converting unit comprises a multiplexer which receives an analog signal corresponding to each of a plurality of channels, and outputs an analog signal of a channel based on the channel selection signal, and an A/D converter which converts an analog signal output from the multiplexer into a digital signal.
According to a still further aspect of the invention, the synchronization signal generator generates a synchronization signal at each cycle of the A/D clock prepared in the A/D converter, or generates a synchronization signal at each slot corresponding to an integer multiple of the A/D clock cycle.
According to a still yet further aspect of the invention, the synchronization signal generator generates a synchronization signal at each cycle of an A/D clock in an automatic A/D clock mode, and generates a corresponding synchronization signal at each slot corresponding to an integer multiple of a system clock in an automatic slot mode, and is disabled in a manual mode, and the channel selection controller outputs a channel selection signal according to channel selection information provided by a signal processor.
According to an additional aspect of the invention, if the synchronization signal is input, the channel selection controller outputs an address of a channel corresponding to the signal as a channel selection signal.
According to an additional embodiment of the invention, the multi-channel A/D converter is achieved by a chip on which any one apparatus is mounted, a disc drive in which the chip is embedded, or a reproducing apparatus in which the disc drive is installed.